Did some idle measurements with these.. 

VDD1 : 2.0 mA
VDD2 : 2.3 mA

The numbers are on the higher side as the thresholds are still not optimal. 
Currently C6 has a threshold set to 300 ms which seems to be very low.
We are working on deriving the optimal thresholds for each C state. 

> -----Original Message-----
> From: [EMAIL PROTECTED] 
> [mailto:[EMAIL PROTECTED] On Behalf Of Rajendra Nayak
> Sent: Tuesday, July 01, 2008 7:46 PM
> To: [email protected]
> Subject: [PATCH 00/11] OMAP3 CPUidle patches
> 
> Hi,
> 
> The following patches define and enable all of the below 
> mentioned C states for OMAP3. 
> These are tested with a minimal kernel config on OMAP3430sdp 
> as most drivers today don't have context save/restore in place and
> some even lack aggresive clock handling. 
> These apply on top of the workaround patch set submitted by Jouni. 
> ([PATCH 0/6] 34XX: PM: Workarounds to get omap3 to retention 4th.)
> 
> The following is neccessay even with a minimal config to achieve OFF.
>  $ echo 1 > /sys/power/sleep_while_idle
>  $ echo 1 > /sys/power/clocks_off_while_idle
>   
> The following C states are defined
> C0 - System executing code
> C1 - MPU WFI + Core active
> C2 - MPU CSWR + Core active
> C3 - MPU OFF + Core active
> C4 - MPU CSWR + Core CSWR
> C5 - MPU OFF + Core CSWR
> C6 - MPU OFF + Core OFF
>  
> regards,
> Rajendra
> 
> 
> 
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