Hi,
Resending Patch after fixing tony's comments.
this patch modifies the read write function to do
16/32 bit read write depending on CPU.
Regards,
Chandra Shekhar
Signed-off-by: Chandra Shekhar< [EMAIL PROTECTED]>
---
arch/arm/plat-omap/mcbsp.c | 23 ++++++++++++++++++++++-
include/asm-arm/arch-omap/mcbsp.h | 4 ----
2 files changed, 22 insertions(+), 5 deletions(-)
Index: linux-omap-2.6/arch/arm/plat-omap/mcbsp.c
===================================================================
--- linux-omap-2.6.orig/arch/arm/plat-omap/mcbsp.c 2008-08-07
16:39:51.000000000 +0530
+++ linux-omap-2.6/arch/arm/plat-omap/mcbsp.c 2008-08-08 12:37:11.000000000
+0530
@@ -30,8 +30,29 @@
struct omap_mcbsp **mcbsp_ptr;
int omap_mcbsp_count;
+void omap_mcbsp_write(u32 io_base, u16 reg, u32 val)
+{
+ if (cpu_class_is_omap1() || cpu_is_omap2420())
+ __raw_writew((u16)val, io_base + reg);
+ else
+ __raw_writel(val, io_base + reg);
+}
+
+int omap_mcbsp_read(u32 io_base, u16 reg)
+{
+ if (cpu_class_is_omap1() || cpu_is_omap2420())
+ return __raw_readw(io_base + reg);
+ else
+ return __raw_readl(io_base + reg);
+}
+
+#define OMAP_MCBSP_READ(base, reg) \
+ omap_mcbsp_read(base, OMAP_MCBSP_REG_##reg)
+#define OMAP_MCBSP_WRITE(base, reg, val) \
+ omap_mcbsp_write(base, OMAP_MCBSP_REG_##reg, val)
+
#define omap_mcbsp_check_valid_id(id) (id < omap_mcbsp_count)
-#define id_to_mcbsp_ptr(id) mcbsp_ptr[id];
+#define id_to_mcbsp_ptr(id) mcbsp_ptr[id];
static void omap_mcbsp_dump_reg(u8 id)
{
Index: linux-omap-2.6/include/asm-arm/arch-omap/mcbsp.h
===================================================================
--- linux-omap-2.6.orig/include/asm-arm/arch-omap/mcbsp.h 2008-08-07
16:41:17.000000000 +0530
+++ linux-omap-2.6/include/asm-arm/arch-omap/mcbsp.h 2008-08-08
12:02:38.000000000 +0530
@@ -139,10 +139,6 @@
#endif
-#define OMAP_MCBSP_READ(base, reg) __raw_readw((base) +
OMAP_MCBSP_REG_##reg)
-#define OMAP_MCBSP_WRITE(base, reg, val) __raw_writew((val), (base) +
OMAP_MCBSP_REG_##reg)
-
-
/************************** McBSP SPCR1 bit definitions
***********************/
#define RRST 0x0001
#define RRDY 0x0002
--
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