I was trying to get audio going through McBSP3, and was getting this:
omap-mcbsp omap-mcbsp.3: Unable to request RX IRQ 0 for McBSP3
This patch fixes the problem for me.
-------------------------------------------------------------------------
From: Grazvydas Ignotas <[EMAIL PROTECTED]>
Transmit and receive interrupts must be specified for McBSP
driver to work with McBSP 3-5.
Signed-off-by: Grazvydas Ignotas <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/mcbsp.c | 6 ++++++
arch/arm/plat-omap/include/mach/irqs.h | 6 ++++++
2 files changed, 12 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index afbe1e6..81c0d8b 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -244,6 +244,8 @@ static struct omap_mcbsp_platform_data
omap34xx_mcbsp_pdata[] = {
.phys_base = OMAP34XX_MCBSP3_BASE,
.dma_rx_sync = OMAP24XX_DMA_MCBSP3_RX,
.dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX,
+ .rx_irq = INT_34XX_MCBSP3_IRQ_RX,
+ .tx_irq = INT_34XX_MCBSP3_IRQ_TX,
.ops = &omap2_mcbsp_ops,
.clk_name = "mcbsp_clk",
},
@@ -251,6 +253,8 @@ static struct omap_mcbsp_platform_data
omap34xx_mcbsp_pdata[] = {
.phys_base = OMAP34XX_MCBSP4_BASE,
.dma_rx_sync = OMAP24XX_DMA_MCBSP4_RX,
.dma_tx_sync = OMAP24XX_DMA_MCBSP4_TX,
+ .rx_irq = INT_34XX_MCBSP4_IRQ_RX,
+ .tx_irq = INT_34XX_MCBSP4_IRQ_TX,
.ops = &omap2_mcbsp_ops,
.clk_name = "mcbsp_clk",
},
@@ -258,6 +262,8 @@ static struct omap_mcbsp_platform_data
omap34xx_mcbsp_pdata[] = {
.phys_base = OMAP34XX_MCBSP5_BASE,
.dma_rx_sync = OMAP24XX_DMA_MCBSP5_RX,
.dma_tx_sync = OMAP24XX_DMA_MCBSP5_TX,
+ .rx_irq = INT_34XX_MCBSP5_IRQ_RX,
+ .tx_irq = INT_34XX_MCBSP5_IRQ_TX,
.ops = &omap2_mcbsp_ops,
.clk_name = "mcbsp_clk",
},
diff --git a/arch/arm/plat-omap/include/mach/irqs.h
b/arch/arm/plat-omap/include/mach/irqs.h
index e51e5e6..2858847 100644
--- a/arch/arm/plat-omap/include/mach/irqs.h
+++ b/arch/arm/plat-omap/include/mach/irqs.h
@@ -316,11 +316,17 @@
#define INT_34XX_USIM_IRQ 35
#define INT_34XX_WDT3_IRQ 36
#define INT_34XX_SPI4_IRQ 48
+#define INT_34XX_MCBSP4_IRQ_TX 54
+#define INT_34XX_MCBSP4_IRQ_RX 55
#define INT_34XX_I2C3_IRQ 61
#define INT_34XX_PBIAS_IRQ 75
#define INT_34XX_OHCI_IRQ 76
#define INT_34XX_EHCI_IRQ 77
#define INT_34XX_TLL_IRQ 78
+#define INT_34XX_MCBSP5_IRQ_TX 81
+#define INT_34XX_MCBSP5_IRQ_RX 82
+#define INT_34XX_MCBSP3_IRQ_TX 89
+#define INT_34XX_MCBSP3_IRQ_RX 90
#define INT_34XX_MMC3_IRQ 94
#define INT_34XX_GPT12_IRQ 95
--
1.5.4.3
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