On Tue, Jan 27, 2009 at 07:44:18PM -0700, Paul Walmsley wrote:
> Each DPLL exists in its own powerdomain (cf 34xx TRM figure 4-18) and
> clockdomain; so, create powerdomain and clockdomain structures for them.
> Mark each DPLL clock as belonging to their respective DPLL clockdomain.
> cf. 34xx TRM Table 4-27 (among other references).

I don't really see the need to mark all these clocks as having a domain.
Yes, it makes sense to mark the actual DPLL clocks themselves with the
relevent DPLL domain.  However, it makes no sense to mark the children
as well.

Why?  When we enable a clock, we walk up the tree enabling the domains
first.  So, even if we're enabling a child clock, we will walk the tree
up to the DPLL and enable the clock domain before we do anything at all.

Sure, if a clock has a multiplexer and that multiplexer is in a different
clock domain from its parent, it makes sense to.  But otherwise it doesn't.
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