From: Felipe Contreras <[email protected]>
Signed-off-by: Felipe Contreras <[email protected]>
---
drivers/dsp/bridge/wmd/tiomap_sm.c | 83 +++++++++++++++++-------------------
1 files changed, 39 insertions(+), 44 deletions(-)
diff --git a/drivers/dsp/bridge/wmd/tiomap_sm.c
b/drivers/dsp/bridge/wmd/tiomap_sm.c
index 5249ea5..fe4acd8 100644
--- a/drivers/dsp/bridge/wmd/tiomap_sm.c
+++ b/drivers/dsp/bridge/wmd/tiomap_sm.c
@@ -43,38 +43,37 @@ DSP_STATUS CHNLSM_EnableInterrupt(struct WMD_DEV_CONTEXT
*hDevContext)
/* Read the messages in the mailbox until the message queue is empty */
- status = CFG_GetHostResources(
- (struct CFG_DEVNODE *)DRV_GetFirstDevExtension(),
- &resources);
+ status = CFG_GetHostResources((struct CFG_DEVNODE
*)DRV_GetFirstDevExtension(),
+ &resources);
status = DEV_GetDevType(pDevContext->hDevObject, &devType);
status = DEV_GetIOMgr(pDevContext->hDevObject, &hIOMgr);
if (devType == DSP_UNIT) {
hwStatus = HW_MBOX_NumMsgGet(resources.dwMboxBase,
- MBOX_DSP2ARM, &numMbxMsg);
+ MBOX_DSP2ARM, &numMbxMsg);
while (numMbxMsg != 0) {
hwStatus = HW_MBOX_MsgRead(resources.dwMboxBase,
- MBOX_DSP2ARM,
- &mbxValue);
+ MBOX_DSP2ARM,
+ &mbxValue);
numMbxMsg--;
}
/* clear the DSP mailbox as well...*/
hwStatus = HW_MBOX_NumMsgGet(resources.dwMboxBase,
- MBOX_ARM2DSP, &numMbxMsg);
+ MBOX_ARM2DSP, &numMbxMsg);
while (numMbxMsg != 0) {
hwStatus = HW_MBOX_MsgRead(resources.dwMboxBase,
- MBOX_ARM2DSP, &mbxValue);
+ MBOX_ARM2DSP, &mbxValue);
numMbxMsg--;
UTIL_Wait(10);
HW_MBOX_EventAck(resources.dwMboxBase, MBOX_ARM2DSP,
- HW_MBOX_U1_DSP1,
- HW_MBOX_INT_NEW_MSG);
+ HW_MBOX_U1_DSP1,
+ HW_MBOX_INT_NEW_MSG);
}
/* Enable the new message events on this IRQ line */
hwStatus = HW_MBOX_EventEnable(resources.dwMboxBase,
- MBOX_DSP2ARM,
- MBOX_ARM,
- HW_MBOX_INT_NEW_MSG);
+ MBOX_DSP2ARM,
+ MBOX_ARM,
+ HW_MBOX_INT_NEW_MSG);
}
return status;
@@ -88,11 +87,10 @@ DSP_STATUS CHNLSM_DisableInterrupt(struct WMD_DEV_CONTEXT
*hDevContext)
DBG_Trace(DBG_ENTER, "CHNLSM_DisableInterrupt(0x%x)\n", hDevContext);
- status = CFG_GetHostResources(
- (struct CFG_DEVNODE *)DRV_GetFirstDevExtension(),
- &resources);
+ status = CFG_GetHostResources((struct CFG_DEVNODE
*)DRV_GetFirstDevExtension(),
+ &resources);
hwStatus = HW_MBOX_EventDisable(resources.dwMboxBase, MBOX_DSP2ARM,
- MBOX_ARM, HW_MBOX_INT_NEW_MSG);
+ MBOX_ARM, HW_MBOX_INT_NEW_MSG);
return status;
}
@@ -103,7 +101,7 @@ DSP_STATUS CHNLSM_InterruptDSP(struct WMD_DEV_CONTEXT
*hDevContext)
#ifdef CONFIG_BRIDGE_DVFS
struct dspbridge_platform_data *pdata =
- omap_dspbridge_dev.dev.platform_data;
+ omap_dspbridge_dev.dev.platform_data;
u32 opplevel = 0;
#endif
HW_STATUS hwStatus;
@@ -113,37 +111,35 @@ DSP_STATUS CHNLSM_InterruptDSP(struct WMD_DEV_CONTEXT
*hDevContext)
u32 temp;
/* We are waiting indefinitely here. This needs to be fixed in the
* second phase */
- status = CFG_GetHostResources(
- (struct CFG_DEVNODE *)DRV_GetFirstDevExtension(),
- &resources);
+ status = CFG_GetHostResources((struct CFG_DEVNODE
*)DRV_GetFirstDevExtension(),
+ &resources);
#ifdef CONFIG_BRIDGE_DVFS
- if (pdata->dsp_get_opp)
- opplevel = (*pdata->dsp_get_opp)();
-
- /* If OPP is at minimum level, increase it before waking up
- * the DSP */
- if (opplevel == 1) {
- if (pdata->dsp_set_min_opp) {
- (*pdata->dsp_set_min_opp)(opplevel+1);
- DBG_Trace(DBG_LEVEL7, "CHNLSM_InterruptDSP: "
- "Setting the vdd1 opp level to %d "
- "before waking DSP \n",
- (opplevel + 1));
- }
+ if (pdata->dsp_get_opp)
+ opplevel = (*pdata->dsp_get_opp)();
+
+ /* If OPP is at minimum level, increase it before waking up
+ * the DSP */
+ if (opplevel == 1) {
+ if (pdata->dsp_set_min_opp) {
+ (*pdata->dsp_set_min_opp)(opplevel+1);
+ DBG_Trace(DBG_LEVEL7, "CHNLSM_InterruptDSP: "
+ "Setting the vdd1 opp level to %d "
+ "before waking DSP \n",
+ (opplevel + 1));
}
+ }
#endif
- if (pDevContext->dwBrdState == BRD_DSP_HIBERNATION ||
+ if (pDevContext->dwBrdState == BRD_DSP_HIBERNATION ||
pDevContext->dwBrdState == BRD_HIBERNATION) {
- temp = (u32) *((REG_UWORD32 *) ((u32)
- (resources.dwDmmuBase) + 0x10));
+ temp = (u32) *((REG_UWORD32 *) ((u32) (resources.dwDmmuBase) +
0x10));
/* Restore mailbox settings */
status = HW_MBOX_restoreSettings(resources.dwMboxBase);
- /* Restart the peripheral clocks that were disabled only
- * in DSP initiated Hibernation case.*/
+ /* Restart the peripheral clocks that were disabled only
+ * in DSP initiated Hibernation case.*/
if (pDevContext->dwBrdState == BRD_DSP_HIBERNATION)
DSP_PeripheralClocks_Enable(hDevContext, NULL);
@@ -151,7 +147,7 @@ DSP_STATUS CHNLSM_InterruptDSP(struct WMD_DEV_CONTEXT
*hDevContext)
}
while (--cnt) {
hwStatus = HW_MBOX_IsFull(resources.dwMboxBase,
- MBOX_ARM2DSP, &mbxFull);
+ MBOX_ARM2DSP, &mbxFull);
if (mbxFull)
UTIL_Wait(1000); /* wait for 1 ms) */
else
@@ -163,10 +159,10 @@ DSP_STATUS CHNLSM_InterruptDSP(struct WMD_DEV_CONTEXT
*hDevContext)
return status;
}
DBG_Trace(DBG_LEVEL3, "writing %x to Mailbox\n",
- pDevContext->wIntrVal2Dsp);
+ pDevContext->wIntrVal2Dsp);
hwStatus = HW_MBOX_MsgWrite(resources.dwMboxBase, MBOX_ARM2DSP,
- pDevContext->wIntrVal2Dsp);
+ pDevContext->wIntrVal2Dsp);
/* set the Mailbox interrupt to default value */
pDevContext->wIntrVal2Dsp = MBX_PCPY_CLASS;
return status;
@@ -195,8 +191,7 @@ bool CHNLSM_ISR(struct WMD_DEV_CONTEXT *hDevContext, OUT
bool *pfSchedDPC,
DBG_Trace(DBG_ENTER, "CHNLSM_ISR(0x%x)\n", hDevContext);
- CFG_GetHostResources(
- (struct CFG_DEVNODE *)DRV_GetFirstDevExtension(), &resources);
+ CFG_GetHostResources((struct CFG_DEVNODE *)DRV_GetFirstDevExtension(),
&resources);
HW_MBOX_NumMsgGet(resources.dwMboxBase, MBOX_DSP2ARM, &numMbxMsg);
--
1.6.2.1.287.g9a8be
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