From: Felipe Balbi <[email protected]> Date: Fri, 2 Jan 2015 16:15:59 -0600
> The CPSW IP implements pulse-signaled interrupts. Due to > that we must write a correct, pre-defined value to the > CPDMA_MACEOIVECTOR register so the controller generates > a pulse on the correct IRQ line to signal the End Of > Interrupt. > > The way the driver is written today, all four IRQ lines > are requested using the same IRQ handler and, because of > that, we could fall into situations where a TX IRQ fires > but we tell the controller that we ended an RX IRQ (or > vice-versa). This situation triggers an IRQ storm on the > reserved IRQ 127 of INTC which will in turn call ack_bad_irq() > which will, then, print a ton of: ... > Reported-by: Yegor Yefremov <[email protected]> > Fixes: 510a1e7 (drivers: net: davinci_cpdma: acknowledge interrupt properly) > Cc: <[email protected]> # v3.9+ > Signed-off-by: Felipe Balbi <[email protected]> Applied, thanks. -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
