Kalle Jokiniemi <kalle.jokini...@digia.com> writes:
> The hardware SAVEANDRESTORE mechanism seems to leave
> USB HOST power domain permanently into active state
> after one transition from off to active state.
> Disabling for now.
>
> Signed-off-by: Kalle Jokiniemi <ext-kalle.jokini...@nokia.com>
Thanks, pushing to PM branch.
Paul, will you incoporate this into your upstream queue as well?
Thanks,
Kevin
> ---
> arch/arm/mach-omap2/powerdomains34xx.h | 8 +++++++-
> 1 files changed, 7 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/powerdomains34xx.h
> b/arch/arm/mach-omap2/powerdomains34xx.h
> index 4dcf94b..aa557b2 100644
> --- a/arch/arm/mach-omap2/powerdomains34xx.h
> +++ b/arch/arm/mach-omap2/powerdomains34xx.h
> @@ -338,7 +338,13 @@ static struct powerdomain usbhost_pwrdm = {
> .sleepdep_srcs = dss_per_usbhost_sleepdeps,
> .pwrsts = PWRSTS_OFF_RET_ON,
> .pwrsts_logic_ret = PWRDM_POWER_RET,
> - .flags = PWRDM_HAS_HDWR_SAR, /* for USBHOST ctrlr only */
> + /*
> + * REVISIT: Enabling usb host save and restore mechanism seems to
> + * leave the usb host domain permanently in ACTIVE mode after
> + * changing the usb host power domain state from OFF to active once.
> + * Disabling for now.
> + */
> + /*.flags = PWRDM_HAS_HDWR_SAR,*/ /* for USBHOST ctrlr only */
> .banks = 1,
> .pwrsts_mem_ret = {
> [0] = PWRDM_POWER_RET, /* MEMRETSTATE */
> --
> 1.5.4.3
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