Hi Jean,
a minor request: it is easier to comment on these patches if they are
included inline in the E-mail message, rather than attached. That way
code comments can be inlined in the reply.
On Tue, 26 May 2009, Jean Pihet wrote:
> Here is a patch for the SDRC 2nd CS support. It applies on top of the current
> pm branch.
Thanks for doing this work.
> I have some questions:
> - Is it OK to copy the micron sdram params file to a new file with the 2 CSes
> params? One could use a unique file with #ifdef SDRC_SUPPORT_2_CSES.
Is it possible for the SDRAM parameter files to remain unchanged, and to
simply pass two struct omap_sdrc_params * to omap2_init_common_hw() and
then to omap2_sdrc_init()? Boards with only CS0 in use should pass NULL
for the second omap_sdrc_params *.
So something like this (I realize the PM branch has additional parameters
here also):
void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
struct omap_sdrc_params *sdrc_cs1)
Then:
void __init omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
struct omap_sdrc_params *sdrc_cs1)
I would prefer that approach.
It would also be good to avoid changing the SDRC CS1 parameters in the
SRAM code if the board does not use CS1. Maybe pass in a flag that
indicates whether CS1 is in use, and if not, avoid programming those
registers? The (admittedly minor) overhead of loading the CS1 registers
off the stack would be nice to avoid also.
> - Does the RX51 board have 2 sdram parts? If so I need to update the board
> file as well.
Probably best if someone from Nokia handles this.
- Paul
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