ext Rajendra Nayak <[email protected]> writes:

> If autoidle for DPLL4 is enabled in the stored scratchpad
> value of CM_AUTOIDLE_PLL then there is an added delay by
> the boot ROM when coming out of OFF mode.
> The patch disables this bitfield in the stored scratchpad value.
>
> This should significantly reduce CORE OFF latency and also
> bring down the threshold for CORE OFF, making OFF affordable
> even with smaller sleep times.
> This patch however does not optimize the C state threshold for
> CORE OFF states based on the new latency.

Do you have any numbers to give on what is the impact to consumption?

>
> Signed-off-by: Rajendra Nayak <[email protected]>
> ---
>  arch/arm/mach-omap2/control.c |    7 +++++++
>  1 files changed, 7 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
> index c9407c0..a7159a9 100644
> --- a/arch/arm/mach-omap2/control.c
> +++ b/arch/arm/mach-omap2/control.c
> @@ -238,6 +238,13 @@ void omap3_save_scratchpad_contents(void)
>                       cm_read_mod_reg(PLL_MOD, CM_CLKEN);
>       prcm_block_contents.cm_autoidle_pll =
>                       cm_read_mod_reg(PLL_MOD, OMAP3430_CM_AUTOIDLE_PLL);
> +     /*
> +      * ROM restore takes 20mS longer if PER idle is enabled before OFF.
> +      * Clear feature before sleep. The origional idle state is
> +      * restored by software as part of wake procedure.
> +      */
> +     prcm_block_contents.cm_autoidle_pll &= ~OMAP3430_AUTO_PERIPH_DPLL_MASK;
> +
>       prcm_block_contents.cm_clksel1_pll =
>                       cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL1_PLL);
>       prcm_block_contents.cm_clksel2_pll =
> -- 
> 1.5.4.7
>
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-- 
Jouni Högander
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