Instead of using below code in current drive, it seems we have to add
code to follow the steps in OMAP34xx TRM to make it work.
/*
* TI16C752/Startech hardware flow control. FIXME:
* - TI16C752 requires control thresholds to be set.
* - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
*/
if (termios->c_cflag & CRTSCTS)
efr |= UART_EFR_CTS;
Followings are copied from OMAP34xx TRM.
To enable and configure hardware flow control, perform the following
procedure:
1. Switch to register configuration mode A to access the UARTi.MCR_REG
register:
a. Save the current UARTi.LCR_REG.
b. Set UARTi.LCR_REG to 0x0080.
2. Enable register submode TCR_TLR to access UARTi.TCR_REG (part 1 of
2):
a. Save the UARTi.MCR_REG[6] TCR_TLR value.
b. Set UARTi.MCR_REG[6] TCR_TLR = 1.
3. Switch to register configuration mode B to access the UARTi.EFR_REG
register:
Set UARTi.LCR_REG to 0x00BF.
4. Enable register submode TCR_TLR to access the UARTi.TCR_REG register
(part 2 of 2):
a. Save the UARTi.EFR_REG[4] ENHANCED_EN value.
b. Set the UARTi.EFR_REG[4] ENHANCED_EN bit to 1.
5. Load the new start and halt trigger values for hardware flow control:
Set the following bits to the desired values:
* UARTi.TCR_REG[7:4] AUTO_RTS_START
* UARTi.TCR_REG[3:0] AUTO_RTS_HALT
6. Enable or disable receive and transmit hardware flow control mode and
restore the UARTi.EFR_REG[4] ENHANCED_EN value saved in Step 4a.
Set the following bits to the desired values:
* UARTi.EFR_REG[7] AUTO_CTS_EN (0: Disable/1: Enable) * UARTi.EFR_REG[6]
AUTO_RTS_EN (0: Disable/1: Enable) Restore UARTi.EFR_REG[4] ENHANCED_EN
to the saved value.
7. Switch to register configuration mode A to access UARTi.MCR_REG:
Set UARTi.LCR_REG to 0x0080.
8. Restore the UARTi.MCR_REG[6] TCR_TLR value saved in Step 2a.
9. Restore the UARTi.LCR_REG value saved in Step 1a.
See Section 17.4.4.1.3.2, Hardware Flow Control, to choose the following
values:
* UARTi.EFR_REG[7] AUTO_CTS_EN
* UARTi.EFR_REG[6] AUTO_RTS_EN
* UARTi.TCR_REG[7:4] AUTO_RTS_START
* UARTi.TCR_REG[3:0] AUTO_RTS_HALT
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