On Fri, 2 Oct 2009, Tony Lindgren wrote:

> From: Rajendra Nayak <[email protected]>
> 
> Lock DPLL5 at 120MHz at boot. The USBHOST 120MHz f-clock and
> USBTLL f-clock are the only users of this DPLL, and 120MHz is
> is the only recommended rate for these clocks.
> 
> With this patch, the 60 MHz ULPI clock is generated correctly.
> 
> Tested on an OMAP3430 SDP.
> 
> Signed-off-by: Rajendra Nayak <[email protected]>
> Signed-off-by: Anand Gadiyar <[email protected]>
> Signed-off-by: Tony Lindgren <[email protected]>

Signed-off-by: Paul Walmsley <[email protected]>


- Paul
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