On Mon, Oct 19, 2009 at 03:42:19PM +0300, Peter Ujfalusi wrote:
> + apll_ctrl = twl4030_read_reg_cache(codec, TWL4030_REG_APLL_CTL);
> + apll_ctrl &= ~TWL4030_APLL_INFREQ;
> switch (freq) {
I'll apply this - it's idiomatic for the current driver - but you might
want to look at snd_soc_update_bits() which does a read/modify/write
cycle for you.
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