Hi Tony and Paul,
maybe a silly question, but here it goes:
Do we have any piece of code handling the L4 interconnect memory space ?
I mean, looking at omap3 TRM pages 212 - 219, I see that e.g. for the
musb block we have:
HS USB OTG 0x480AB000 - 0x480ABFFF 4KB Module
0x480AC000 - 0x480ACFFF 4KB L4 interconnect
So the first 4K is what we pass down to drivers via struct resource and
the second 4K ? What do we do with that ?
--
balbi
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