Nishanth Menon <[email protected]> writes:
> commit ad248123 changed the behavior of get_vdd1_opp and get_vdd2_opp
> to use exact frequencies causing a break in rx51. we re-introduce the
> approximate search to maintain consistent behavior.
>
> The DPLL frequencies are expected to be the same as the OPP frequencies,
> inconsistency here should be investigated, this introduces a warning for
> the same.
>
> Discussion: http://marc.info/?t=125800503700009&r=1&w=2
>
> Reported-by: Kevin Hilman <[email protected]>
> Cc: Kevin Hilman <[email protected]>
> Signed-off-by: Nishanth Menon <[email protected]>
Thanks, this is what I was hoping for.
Folding into original patch and will push new pm-wip-opp.
Kevin
> ---
> arch/arm/mach-omap2/smartreflex.c | 23 ++++++++++++++++++++---
> 1 files changed, 20 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/smartreflex.c
> b/arch/arm/mach-omap2/smartreflex.c
> index d341857..c518f9e 100644
> --- a/arch/arm/mach-omap2/smartreflex.c
> +++ b/arch/arm/mach-omap2/smartreflex.c
> @@ -150,14 +150,23 @@ static u32 cal_test_nvalue(u32 sennval, u32 senpval)
> static u8 get_vdd1_opp(void)
> {
> struct omap_opp *opp;
> + unsigned long freq;
>
> if (sr1.vdd_opp_clk == NULL || IS_ERR(sr1.vdd_opp_clk) ||
> mpu_opps == NULL)
> return 0;
>
> - opp = opp_find_freq_exact(mpu_opps, sr1.vdd_opp_clk->rate, true);
> + freq = sr1.vdd_opp_clk->rate;
> + opp = opp_find_freq_ceil(mpu_opps, &freq);
> if (IS_ERR(opp))
> return 0;
> + /*
> + * Use higher freq voltage even if an exact match is not available
> + * we are probably masking a clock framework bug, so warn
> + */
> + if (unlikely(freq != sr1.vdd_opp_clk->rate))
> + pr_warning("%s: Available freq %ld != dpll freq %ld.\n",
> + __func__, freq, sr1.vdd_opp_clk->rate);
>
> return opp_get_opp_id(opp);
> }
> @@ -165,15 +174,23 @@ static u8 get_vdd1_opp(void)
> static u8 get_vdd2_opp(void)
> {
> struct omap_opp *opp;
> + unsigned long freq;
>
> if (sr2.vdd_opp_clk == NULL || IS_ERR(sr2.vdd_opp_clk) ||
> l3_opps == NULL)
> return 0;
> -
> - opp = opp_find_freq_exact(l3_opps, sr2.vdd_opp_clk->rate, true);
> + freq = sr2.vdd_opp_clk->rate;
> + opp = opp_find_freq_ceil(l3_opps, &freq);
> if (IS_ERR(opp))
> return 0;
>
> + /*
> + * Use higher freq voltage even if an exact match is not available
> + * we are probably masking a clock framework bug, so warn
> + */
> + if (unlikely(freq != sr2.vdd_opp_clk->rate))
> + pr_warning("%s: Available freq %ld != dpll freq %ld.\n",
> + __func__, freq, sr2.vdd_opp_clk->rate);
> return opp_get_opp_id(opp);
> }
>
> --
> 1.6.3.3
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