Hello Teerth, On Mon, 25 Jan 2010, Reddy, Teerth wrote:
> > From: Paul Walmsley [mailto:[email protected]] > > > > I wonder if this also needs to make sure that all the other system > > initiators are mute before continuing, for the same reason cited in commit > > 18862cbe47e37beba98f22c088fbe6fe029df889 ? I suppose that, for example, > > if an interrupt occurs on the IVA2.2 or the DMA controller tries to access > > the SDRC, it would hopefully only wedge those initiators and not the whole > > chip? > Do you think we need to take care of the system initiators if we are > disabling all the interrupts before going for a warm reset? Are you disabling _all_ the interrupts, or just the MPU's interrupts? Even if you did disable all of the system interrupts, couldn't DMA be ongoing from/to another system initiator, independently of interrupts? > I think this doesn't seem to hold good here. You may be right, but I'd like you to describe your reasoning on this point. > Please let me know if you understanding is wrong. My concerns here are twofold: 1. If other system initiators are interacting with the SDRC during this process, is there a danger that the interconnect could enter a state that would prevent the warm reset from occurring, thus wedging the system? 2. When the warm-reset occurs, will it also completely reset other initiators that may be wedged waiting for some SDRC access to complete? - Paul -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
