Menon, Nishanth had written, on 04/08/2010 12:54 PM, the following:
From: Deepak K <deepa...@ti.com>
[...]
Cc: Govindraj R <govindraj.r...@ti.com>
Cc: Kevin Hilman <khil...@deeprootsystems.com>
Cc: Tero Kristo <tero.kri...@nokia.com>
Signed-off-by: Deepak K <deepa...@ti.com>
Signed-off-by: Nishanth Menon <n...@ti.com>
---
Note: original patch was done for android kernel, ported and sanity
tested
arch/arm/mach-omap2/serial.c | 18 +++++++++++++++++-
1 files changed, 17 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 86d3b47..144033f 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -223,6 +223,19 @@ static void omap_uart_restore_context(struct
omap_uart_state *uart)
uart->context_valid = 0;
serial_write_reg(p, UART_OMAP_MDR1, 0x7);
+ /*
+ * Work Around for Errata i202 (3430 - 1.12, 3630 - 1.6)
+ * The access to uart register after MDR1 Access
+ * causes UART to corrupt data.
+ *
+ * Need a delay =
+ * 5 L4 clock cycles + 5 UART functional clock cycle (@48MHz = ~0.2uS)
+ * give 10 times as much
+ */
+ udelay(2);
+ /* TX and RX FIFO Clear; FIFO dis */
+ serial_write_reg(p, UART_FCR, 0xA6);
NAK
Late realization: should be checking if FIFO clear actually occurred
before proceeding (FIFO clear bits will be cleared by h/w once it is
complete,
so need to add a
/* wait till TX and RX fifos are cleard by h/w */
while(serial_read_reg(p, UART_FCR) & 0x06)
;
+
serial_write_reg(p, UART_LCR, 0xBF); /* Config B mode */
efr = serial_read_reg(p, UART_EFR);
serial_write_reg(p, UART_EFR, UART_EFR_ECB);
@@ -235,7 +248,6 @@ static void omap_uart_restore_context(struct
omap_uart_state *uart)
serial_write_reg(p, UART_IER, uart->ier);
serial_write_reg(p, UART_LCR, 0x80);
serial_write_reg(p, UART_MCR, uart->mcr);
- serial_write_reg(p, UART_FCR, 0xA1);
serial_write_reg(p, UART_LCR, 0xBF); /* Config B mode */
serial_write_reg(p, UART_EFR, efr);
serial_write_reg(p, UART_LCR, UART_LCR_WLEN8);
@@ -243,6 +255,10 @@ static void omap_uart_restore_context(struct
omap_uart_state *uart)
serial_write_reg(p, UART_OMAP_WER, uart->wer);
serial_write_reg(p, UART_OMAP_SYSC, uart->sysc);
serial_write_reg(p, UART_OMAP_MDR1, 0x00); /* UART 16x mode */
+ /* Errata: i202 */
+ udelay(2);
+ /* TX and RX FIFO Clear; FIFO en */
+ serial_write_reg(p, UART_FCR, 0xA7);
NAK
same reason
}
#else
static inline void omap_uart_save_context(struct omap_uart_state *uart) {}
I will post a v2 patch in a few mins..
--
Regards,
Nishanth Menon
--
To unsubscribe from this list: send the line "unsubscribe linux-omap" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
