Hi,
>From: [email protected]
>[mailto:[email protected]] On Behalf Of
>Chemparathy, Cyril
>
>In addition to being embedded into the EMAC controller, the CPDMA hardware
>block is used in TI's CPSW switch controller. Fortunately, the programming
>interface to this hardware block remains pretty nicely consistent across these
>devices.
>
>This patch adds a new CPDMA services layer, which can then be reused across
>EMAC and CPSW drivers.
>
>Signed-off-by: Cyril Chemparathy <[email protected]>
>---
> drivers/net/Kconfig | 10 +
> drivers/net/Makefile | 1 +
> drivers/net/davinci_cpdma.c | 836 +++++++++++++++++++++++++++++++++++++++++++
> drivers/net/davinci_cpdma.h | 105 ++++++
> 4 files changed, 952 insertions(+), 0 deletions(-)
> create mode 100644 drivers/net/davinci_cpdma.c
> create mode 100644 drivers/net/davinci_cpdma.h
>
[...]
>diff --git a/drivers/net/davinci_cpdma.c b/drivers/net/davinci_cpdma.c
>new file mode 100644
>index 0000000..acce1c1
>--- /dev/null
>+++ b/drivers/net/davinci_cpdma.c
[...]
>+struct cpdma_chan *cpdma_chan_create(struct cpdma_ctlr *ctlr, int chan_num,
>+ cpdma_handler_fn handler)
>+{
>+ struct cpdma_chan *chan;
>+ int ret, offset = (chan_num % CPDMA_MAX_CHANNELS) * 4;
>+ unsigned long flags;
>+
>+ if (__chan_linear(chan_num) >= ctlr->num_chan)
>+ return NULL;
>+
>+ ret = -ENOMEM;
>+ chan = kzalloc(sizeof(*chan), GFP_KERNEL);
>+ if (!chan)
>+ goto err_chan_alloc;
>+
>+ spin_lock_irqsave(&ctlr->lock, flags);
>+ ret = -EBUSY;
>+ if (ctlr->channels[chan_num])
>+ goto err_chan_busy;
Mem leaking 'chan'
>+
>+ chan->ctlr = ctlr;
>+ chan->state = CPDMA_STATE_IDLE;
>+ chan->chan_num = chan_num;
>+ chan->handler = handler;
>+
>+ if (is_rx_chan(chan)) {
>+ chan->hdp = ctlr->params.rxhdp + offset;
>+ chan->cp = ctlr->params.rxcp + offset;
>+ chan->rxfree = ctlr->params.rxfree + offset;
>+ chan->int_set = CPDMA_RXINTMASKSET;
>+ chan->int_clear = CPDMA_RXINTMASKCLEAR;
>+ chan->td = CPDMA_RXTEARDOWN;
>+ chan->dir = DMA_FROM_DEVICE;
>+ } else {
>+ chan->hdp = ctlr->params.txhdp + offset;
>+ chan->cp = ctlr->params.txcp + offset;
>+ chan->int_set = CPDMA_TXINTMASKSET;
>+ chan->int_clear = CPDMA_TXINTMASKCLEAR;
>+ chan->td = CPDMA_TXTEARDOWN;
>+ chan->dir = DMA_TO_DEVICE;
>+ }
>+ chan->mask = BIT(chan_linear(chan));
>+
>+ spin_lock_init(&chan->lock);
>+
>+ ctlr->channels[chan_num] = chan;
>+ spin_unlock_irqrestore(&ctlr->lock, flags);
>+ return chan;
>+
>+err_chan_busy:
>+ spin_unlock_irqrestore(&ctlr->lock, flags);
>+err_chan_alloc:
>+ return ERR_PTR(ret);
>+}
[...]
Regards,
omar
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