Changing the polarity of the sys_offmode signal to active low,
to get a High to Low transition on the NSLEEP1 of PM IC when OMAP is
entering offmode. Because on PM IC the power resources (LDO, DCDC regulators)
associated with P1 group which is controlled by NSLEEP1 are set to sleep,
when there is transition form High to Low.
Signed-off-by: Lesly A M <lesl...@ti.com>
Cc: Nishanth Menon <n...@ti.com>
Cc: David Derrick <dderr...@ti.com>
Cc: Samuel Ortiz <sa...@linux.intel.com>
---
arch/arm/mach-omap2/pm34xx.c | 4 ++++
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index e46f4b5..8a7c756 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -1034,6 +1034,10 @@ static int __init omap3_pm_init(void)
printk(KERN_ERR "Power Management for TI OMAP3.\n");
+ /* Changing the polarity of the sys_offmode signal to active low */
+ omap2_prm_clear_mod_reg_bits(OMAP3430_OFFMODE_POL_MASK,
+ OMAP3430_GR_MOD, OMAP3_PRM_POLCTRL_OFFSET);
+
/* XXX prcm_setup_regs needs to be before enabling hw
* supervised mode for powerdomains */
prcm_setup_regs();
--
1.7.0.4
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