Tarun Kanti DebBarma <[email protected]> writes:
> switch-over to platform device driver through following changes:
> (a) initiate dmtimer early initialization from omap2_gp_timer_init()
> in timer-gp.c. This is equivalent of timer_init()->timer->init().
> (b) modify plat-omap/dmtimer routines to use new register map and
> platform data.
>
> Signed-off-by: Tarun Kanti DebBarma <[email protected]>
> Acked-by: Cousson, Benoit <[email protected]>
[...]
> @@ -507,20 +394,22 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_start);
> void omap_dm_timer_stop(struct omap_dm_timer *timer)
> {
> u32 l;
> + struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data;
>
> l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
> if (l & OMAP_TIMER_CTRL_ST) {
> l &= ~0x1;
> omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
> -#ifdef CONFIG_ARCH_OMAP2PLUS
> - /* Readback to make sure write has completed */
> - omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
> - /*
> - * Wait for functional clock period x 3.5 to make sure that
> - * timer is stopped
> - */
> - udelay(3500000 / clk_get_rate(timer->fclk) + 1);
> -#endif
> +
> + if (!pdata->is_omap16xx) {
> + /* Readback to make sure write has completed */
> + omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
> + /*
> + * Wait for functional clock period x 3.5 to make
> + * sure that timer is stopped
> + */
> + udelay(3500000 / clk_get_rate(timer->fclk) + 1);
> + }
Can't this 'is_omap16xx' check just be using the IP revision?
> }
Kevin
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