On Mon, Mar 14, 2011 at 10:06:40PM -0400, Ben Gamari wrote: > On Mon, 14 Mar 2011 13:27:18 -0600, Grant Likely <[email protected]> > wrote: > > What if the board wanted to use both the native SPI ss line as well as > > one or more GPIOs? You probably want to reserve cs0 for the native > > gpio line. > > > Hmm, I had thought about this and assumed it would be easiest to punt on > this, requiring the user to use the native line as a GPIO. This of > course assumes that all of the CS lines also have pinmux configurations > as GPIO pins. Is this not a good assumption?
As a general principle I would say no since it would mean adding a 2nd GPIO device will potentially break the first if the infrastructure isn't in place to handle the first line as a gpio. g. -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
