Hi Avinash, "Avinash.H.M" <[email protected]> writes:
> The i2c module has a special reset sequence. The sequence is > - Disable the I2C. > - Write to SOFTRESET bit. > - Enable the I2C. > - Poll on the RESETDONE bit. Shouldn't the final state be disabled after reset? IOW, Shouldn't the I2C be disabled again after the polling? Also, when reposting, please be sure to Cc the linux-arm-kernel mailing list for patches that are targetted for upstream. Thanks, Kevin -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
