Santosh Shilimkar <[email protected]> writes: > When MPUSS hits off-mode e, L2 cache is lost. This patch adds L2X0 ^^^ extra 'e' ?
> necessary maintenance operations and context restoration in the > low power code. > > Signed-off-by: Santosh Shilimkar <[email protected]> > Cc: Kevin Hilman <[email protected]> [...] > @@ -135,6 +138,33 @@ static void scu_pwrst_prepare(unsigned int cpu_id, > unsigned int cpu_state) > __raw_writel(scu_pwr_st, pm_info->scu_sar_addr); > } > > +/* > + * Store the CPU cluster state for L2X0 low power operations. > + */ > +static void l2x0_pwrst_prepare(unsigned int cpu_id, unsigned int save_state) > +{ > + struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu_id); > + > + __raw_writel(save_state, pm_info->l2x0_sar_addr); > +} > + > +/* > + * Save the L2X0 AUXCTRL and POR value to SAR memory. Its used to > + * in every restore MPUSS OFF path. > + */ > +static void save_l2x0_context(void) > +{ > +#ifdef CONFIG_CACHE_L2X0 > + u32 val; > + void __iomem *l2x0_base = omap4_get_l2cache_base(); > + > + val = __raw_readl(l2x0_base + L2X0_AUX_CTRL); > + __raw_writel(val, sar_base + L2X0_AUXCTRL_OFFSET); > + val = __raw_readl(l2x0_base + L2X0_PREFETCH_CTRL); > + __raw_writel(val, sar_base + L2X0_PREFETCH_CTRL_OFFSET); > +#endif nit: (c.f. '#ifdefs are ugly' in Documentatin/SubmittingPatches) This should probably be more like #ifdef CONFIG_CACHE_L2X0 static void save_l2x0_context(void) { /* real function */ } #else static void save_l2x0_context(void) {} #endif Kevin -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
