On Wed, 18 Jan 2012 09:13:59 +0200 Tomi Valkeinen <tomi.valkei...@ti.com> wrote:
> On Fri, 2012-01-13 at 22:20 +1100, NeilBrown wrote: > > Having CPUIDLE makes the DSS2 problem worse: lots of > > > > [ 21.085113] omapdss DISPC error: SYNC_LOST on channel lcd, > > restarting the output with video overlays disabled > > > > messages whenever the CPU isn't busy. > > I'm not sure if it is the case here, but DSS has restrictions about the > max DSS clocks on different OPPs. For example, on OMAP4430 LCD clock > maximum is 186MHz at OPP100, and 93MHz at OPP50. So it's a quite big > drop, causing problems with all but the rather small displays. > > And the DSS driver doesn't have any support to handle this at the > moment, as there isn't support in the PM framework to do this. I think > the only way to handle this at the moment is for the DSS driver to set > an arbitrarily high constraint on, say, mem throughput, and hope that it > keeps the OMAP in the required OPP. > > Tomi > This LCD panel on this device sets: .pixel_clock = 22000, in the "struct omap_video_timings" so I'm guessing that is 22MHz? I'll try building without SMARTREFLEX and see if that makes a difference - presumably that should keep it at OPP100 (??). Thanks, NeilBrown
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