On Fri, Feb 24, 2012 at 5:14 PM, Munegowda, Keshava
<[email protected]> wrote:
> On Fri, Feb 24, 2012 at 3:46 PM, Felipe Balbi <[email protected]> wrote:
>> Hi,
>>
>> On Fri, Feb 24, 2012 at 03:36:15PM +0530, Keshava Munegowda wrote:
>>> From: Keshava Munegowda <[email protected]>
>>>
>>> It is observed that the echi ports of 3430 sdp board
>>> are not working due to the random timing of programming
>>> the associated GPIOs of the ULPI PHYs of the EHCI for reset.
>>> If the PHYs are reset at during usbhs core driver, host ports will
>>> not work because EHCI driver is loaded after the resetting PHYs.
>>> The PHYs should be in reset state while initializing the EHCI
>>> controller.
>>> The code which does the GPIO pins associated with the PHYs
>>> are programmed to reset is moved from the USB host core driver
>>> to EHCI driver.
>>>
>>> Signed-off-by: Keshava Munegowda <[email protected]>
>>> Reviewed-by: Partha Basak <[email protected]>
>>
>> won't this cause issues with EHCI/OHCI interactions ? I mean, what if
>> you connect a FS/LS device and port is handed over to OHCI, does OHCI
>> have any needs to reset the PHY or something similar ?
>
> No, it will not cause any issues with EHCI-OHCI issues.
> But its difficult to comment on this because we don't have port
> handoff supported
> in hardware.
>
> regards
> keshava
Hi Samuel
please let me know if you have any comments on this patch.
This is required patch for omap3 ehci enumeration instabilities.
Regards
Keshava
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