The d_can0/1 module integrated with AM335x device, requires
only one clock (fck) and driver expects clock to be available
without specifying any connection id (con_id) -
clk_get(&pdev->dev, NULL);
This is acceptable as module has only one clock and platform
code should respect this request, so create new clock nodes
inside am33xx clock-tree table based on dev_id and "con_id = NULL"
for both d_can0 and d_can1 instances.
Signed-off-by: Vaibhav Hiremath <hvaib...@ti.com>
Cc: Paul Walmsley <p...@pwsan.com>
Cc: Benoit Cousson <b-cous...@ti.com>
Cc: Tony Lindgren <t...@atomide.com>
---
This patch is boot tested on BeagleBone platform, and checked for
clk_get() api return value.
arch/arm/mach-omap2/clock33xx_data.c | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/clock33xx_data.c
b/arch/arm/mach-omap2/clock33xx_data.c
index ae27de8..23251fa 100644
--- a/arch/arm/mach-omap2/clock33xx_data.c
+++ b/arch/arm/mach-omap2/clock33xx_data.c
@@ -1027,7 +1027,9 @@ static struct omap_clk am33xx_clks[] = {
CLK(NULL, "cefuse_fck", &cefuse_fck, CK_AM33XX),
CLK(NULL, "clkdiv32k_ick", &clkdiv32k_ick, CK_AM33XX),
CLK(NULL, "dcan0_fck", &dcan0_fck, CK_AM33XX),
+ CLK("d_can.0", NULL, &dcan0_fck, CK_AM33XX),
CLK(NULL, "dcan1_fck", &dcan1_fck, CK_AM33XX),
+ CLK("d_can.1", NULL, &dcan1_fck, CK_AM33XX),
CLK(NULL, "debugss_ick", &debugss_ick, CK_AM33XX),
CLK(NULL, "pruss_ocp_gclk", &pruss_ocp_gclk,
CK_AM33XX),
CLK("davinci-mcasp.0", NULL, &mcasp0_fck, CK_AM33XX),
--
1.7.0.4
--
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