Hi Paul, Tony, how do you guys want to handle PWM's Time Base clocks which are enabled via control module ?
They're controlled via offset 0x664 (pwmss_ctrl). Page 793 of AM33xx's TRM has more information: " Table 9-42. pwmss_ctrl Register Field Descriptions Bit Field Type Reset Description 31-3 Reserved R 0h 2 pwmss2_tbclken R/W 0h Timebase clock enable for PWMSS2 1 pwmss1_tbclken R/W 0h Timebase clock enable for PWMSS1 0 pwmss0_tbclken R/W 0h Timebase clock enable for PWMSS0 " We don't have clock nodes for those, but they're needed to have functioning pwm drivers. cheers -- balbi
signature.asc
Description: Digital signature
