The USB PHY gets its clock from AUXCLK3. Provide this
information.
Signed-off-by: Roger Quadros <rog...@ti.com>
---
arch/arm/boot/dts/omap4-panda-common.dtsi | 8 ++------
1 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi
b/arch/arm/boot/dts/omap4-panda-common.dtsi
index faa95b5..dd793ca 100644
--- a/arch/arm/boot/dts/omap4-panda-common.dtsi
+++ b/arch/arm/boot/dts/omap4-panda-common.dtsi
@@ -99,12 +99,8 @@
compatible = "usb-nop-xceiv";
reset-supply = <&hsusb1_reset>;
vcc-supply = <&hsusb1_power>;
- /**
- * FIXME:
- * put the right clock phandle here when available
- * clocks = <&auxclk3>;
- * clock-names = "main_clk";
- */
+ clocks = <&auxclk3_ck>;
+ clock-names = "main_clk";
clock-frequency = <19200000>;
};
};
--
1.7.4.1
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