From: Hebbar, Gururaja <[email protected]>

This adds a sleep and wake sequence to set the VDD core voltage to the
OPP50 level, 0.950V. This saves power during suspend. The sequences are
specific to the EVM-SK layout and PMIC, the TPS65910. The sequences
are written out by the Cortex-M3.

Signed-off-by: Hebbar, Gururaja <[email protected]>
Signed-off-by: Russ Dill <[email protected]>
---
 arch/arm/boot/dts/am335x-evmsk.dts | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/am335x-evmsk.dts 
b/arch/arm/boot/dts/am335x-evmsk.dts
index 0c8ad17..704bbb3 100644
--- a/arch/arm/boot/dts/am335x-evmsk.dts
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -174,6 +174,16 @@
                        status = "okay";
                        clock-frequency = <400000>;
 
+                       /* Set OPP50 (0.95V) for VDD core */
+                       sleep_sequence = /bits/ 8 <
+                               0x02 0x2d 0x25 0x1f /* Set VDD2 to 0.95V */
+                       >;
+
+                       /* Set OPP100 (1.10V) for VDD core */
+                       wake_sequence = /bits/ 8 <
+                               0x02 0x2d 0x25 0x2b /* Set VDD2 to 1.1V */
+                       >;
+
                        tps: tps@2d {
                                reg = <0x2d>;
                        };
-- 
1.8.3.2

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