> On 28/02/14 14:42, Andi Kleen wrote: > I don't think r100b is a valid event on Westmere.
Thanks for the replies. As Harald Servat and others pointed I am now trying "perf mem record" [root@rafa cms]# ./perf mem record /bin/ls invalid or unsupported event: 'cpu/mem-loads/pp' Is this a issue with the (old) kernel version I am on or the CPU version or both. Regards, Muthusamy C > On Friday, February 28, 2014 10:15 PM, Andi Kleen <a...@firstfloor.org> wrote: > >> what do you mean by use-latency here? I understood that PEBS was >> able to report the number of core cycles that the load took to from >> some part of the memory hierarchy until it reached the CPU. > > PEBS load/store latency reports the cycles from when the instruction > started issuing in the pipeline to the return of the value. That's not > quite the same, it can be much longer than the pure memory hierarchy > cost. > > > -Andi > -- > To unsubscribe from this list: send the line "unsubscribe > linux-perf-users" in > the body of a message to majord...@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html > -- To unsubscribe from this list: send the line "unsubscribe linux-perf-users" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
