On Wed, Jul 23, 2014 at 12:09 PM, Dmitry Eremin-Solenikov
<[email protected]> wrote:
> From: Dmitry Eremin-Solenikov <[email protected]>
>
> Writing several values to PWMSAR register with PWM being disabled can
> lead to FIFO (connected to PWMSAR) being overflown. Then after enabling
> PWM, hardware will use stale values. Instead cache the duty cycles and
> write them to the hardware only before enabling PWM.

What about this patch?

>
> Signed-off-by: Dmitry Eremin-Solenikov <[email protected]>
> ---
>  drivers/pwm/pwm-imx.c | 11 ++++++++---
>  1 file changed, 8 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c
> index c735127..79c2b24 100644
> --- a/drivers/pwm/pwm-imx.c
> +++ b/drivers/pwm/pwm-imx.c
> @@ -46,6 +46,7 @@ struct imx_chip {
>         struct clk      *clk_ipg;
>
>         void __iomem    *mmio_base;
> +       unsigned long   duty_cycles;
>
>         struct pwm_chip chip;
>
> @@ -105,7 +106,7 @@ static int imx_pwm_config_v2(struct pwm_chip *chip,
>  {
>         struct imx_chip *imx = to_imx_chip(chip);
>         unsigned long long c;
> -       unsigned long period_cycles, duty_cycles, prescale;
> +       unsigned long period_cycles, prescale;
>         u32 cr;
>
>         c = clk_get_rate(imx->clk_per);
> @@ -118,7 +119,7 @@ static int imx_pwm_config_v2(struct pwm_chip *chip,
>         period_cycles /= prescale;
>         c = (unsigned long long)period_cycles * duty_ns;
>         do_div(c, period_ns);
> -       duty_cycles = c;
> +       imx->duty_cycles = c;
>
>         /*
>          * according to imx pwm RM, the real period value should be
> @@ -134,7 +135,8 @@ static int imx_pwm_config_v2(struct pwm_chip *chip,
>
>         period_cycles -= 2;
>
> -       writel(duty_cycles, imx->mmio_base + MX3_PWMSAR);
> +       if (test_bit(PWMF_ENABLED, &pwm->flags))
> +               writel(imx->duty_cycles, imx->mmio_base + MX3_PWMSAR);
>         writel(period_cycles, imx->mmio_base + MX3_PWMPR);
>
>         cr = readl(imx->mmio_base + MX3_PWMCR);
> @@ -157,6 +159,9 @@ static void imx_pwm_set_enable_v2(struct pwm_chip *chip, 
> bool enable)
>         struct imx_chip *imx = to_imx_chip(chip);
>         u32 val;
>
> +       if (enable)
> +               writel(imx->duty_cycles, imx->mmio_base + MX3_PWMSAR);
> +
>         val = readl(imx->mmio_base + MX3_PWMCR);
>
>         if (enable)
> --
> 1.9.3
>
--
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