[Seth Vidal]
> I did some tests comparing a k6-2 500 vs a celeron 400 - on a raid5
> system - found some interesting results
>
> Raid5 write performance of the celeron is almost 50% better than the k6-2.
Can you report the xor calibration results when booting them?
> Is this b/c of mmx or b/c of the FPU?
FPU should never get involved (except the FPU registers getting used
during MMX operations).
As per Greg's report of the K6-2 having MMX instructions, remember
that a chip having instructions doesn't mean they get used. Again,
this is something that the xor calibrations should help show, though.
MTRR could certainly be another source of additional performance, but I
haven't dealt with the K6-2 in any capacity so I don't even know whether
it has that capability (although I haven't personally heard of anything
not based on the P6 core using MTRR)
> I used tiobench in sizes of > than 3X my memory size on both systems -
> memory and drives of both systems were identical.
If possible, let the resync's finish before testing... this can cause a
huge amount of variance (that I've seen in my testing). speed-limit down
to 0 doesn't appear to help, either (although the additional seeks to
get back to the "data" area from the currently resyncing stripes could
be the base cause)
When looking from a certain realistic POV, it'd be hard to believe that
even a P5 couldn't keep up with the necessary XOR operations... is
there anything else on the system(s) fighting for CPU time?
James
