On Wed, Nov 13, 2013 at 02:55:53AM -0400, Anuj Kalia wrote: > I don't know what you meant by burst writes: do you mean several RDMA > writes or one large write? I'm concered with the order in which data
A RDMA write will be split up by the HCA into a burst of PCI MemoryWr operations. > I guess now is the time I run lots of micro experiments. Thanks a lot > for the help everyone. Carefull, experiments can't prove that order is guranteed to be present, they can only show if it certainly isn't. Intel hardware is very good at hiding ordering issues 99% of the time, but in many cases there can be a stress'd condition that will show a different result. Jason -- To unsubscribe from this list: send the line "unsubscribe linux-rdma" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
