On Mon, Apr 18, 2016 at 06:02:56PM +0200, Ulrich Hecht wrote:
> Same as on r8a7791.
> 
> Signed-off-by: Ulrich Hecht <[email protected]>
> ---
>  arch/arm/boot/dts/r8a7793.dtsi | 36 ++++++++++++++++++++++++++++++++++++
>  1 file changed, 36 insertions(+)

Thanks.

We are back to one DMA controller this week so I updated your patch and
queued up the following.

From: Ulrich Hecht <[email protected]>
Date: Mon, 18 Apr 2016 18:02:56 +0200
Subject: [PATCH] ARM: dts: r8a7793: Add SDHI controllers

Same as on r8a7791.

Signed-off-by: Ulrich Hecht <[email protected]>
Signed-off-by: Simon Horman <[email protected]>
---
 arch/arm/boot/dts/r8a7793.dtsi | 33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index fc552629ed4a..a93d509732a8 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -507,6 +507,39 @@
                reg = <0 0xe6060000 0 0x250>;
        };
 
+       sdhi0: sd@ee100000 {
+               compatible = "renesas,sdhi-r8a7793";
+               reg = <0 0xee100000 0 0x328>;
+               interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7793_CLK_SDHI0>;
+               dmas = <&dmac0 0xcd>, <&dmac0 0xce>;
+               dma-names = "tx", "rx", "tx", "rx";
+               power-domains = <&cpg_clocks>;
+               status = "disabled";
+       };
+
+       sdhi1: sd@ee140000 {
+               compatible = "renesas,sdhi-r8a7793";
+               reg = <0 0xee140000 0 0x100>;
+               interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7793_CLK_SDHI1>;
+               dmas = <&dmac0 0xc1>, <&dmac0 0xc2>;
+               dma-names = "tx", "rx", "tx", "rx";
+               power-domains = <&cpg_clocks>;
+               status = "disabled";
+       };
+
+       sdhi2: sd@ee160000 {
+               compatible = "renesas,sdhi-r8a7793";
+               reg = <0 0xee160000 0 0x100>;
+               interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7793_CLK_SDHI2>;
+               dmas = <&dmac0 0xd3>, <&dmac0 0xd4>;
+               dma-names = "tx", "rx", "tx", "rx";
+               power-domains = <&cpg_clocks>;
+               status = "disabled";
+       };
+
        mmcif0: mmcif@ee200000 {
                compatible = "renesas,mmcif-r8a7793", "renesas,sh-mmcif";
                reg = <0 0xee200000 0 0x80>;
-- 
2.7.0.rc3.207.g0ac5344

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