Setting the FIFO reset bits is not sufficient to reset the RX FIFO. After this the status register's RDF flag bit may still be set, causing the reception of one stale byte of data.
To fix this, clear all status flag bits related to reception, error, and break handling, cfr. the initialization flowchart in the datasheet. Signed-off-by: Geert Uytterhoeven <[email protected]> --- v2: - No changes. --- drivers/tty/serial/sh-sci.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c index eecace576c3b758f..0a2be5d293220e08 100644 --- a/drivers/tty/serial/sh-sci.c +++ b/drivers/tty/serial/sh-sci.c @@ -2055,6 +2055,10 @@ static void sci_reset(struct uart_port *port) reg = sci_getreg(port, SCFCR); if (reg->size) serial_port_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST); + + sci_clear_SCxSR(port, + SCxSR_RDxF_CLEAR(port) & SCxSR_ERROR_CLEAR(port) & + SCxSR_BREAK_CLEAR(port)); } static void sci_set_termios(struct uart_port *port, struct ktermios *termios, -- 1.9.1
