Hi Laurent,
On Tue, Sep 6, 2016 at 10:25 AM, Laurent Pinchart
<[email protected]> wrote:
> Signed-off-by: Laurent Pinchart <[email protected]>
> ---
> drivers/clk/renesas/r8a7796-cpg-mssr.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c
> b/drivers/clk/renesas/r8a7796-cpg-mssr.c
> index cfd5ffb77dfe..868dfe30dfe7 100644
> --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
> +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
> @@ -99,6 +99,7 @@ static const struct cpg_core_clk r8a7796_core_clks[]
> __initconst = {
> static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {
> DEF_MOD("scif2", 310, R8A7796_CLK_S3D4),
> DEF_MOD("intc-ap", 408, R8A7796_CLK_S3D1),
> + DEF_MOD("etheravb", 812, R8A7796_CLK_S3D2),
According to the datasheet, the parent clock on M3-W (and H3 ES2.0!) is S0D6,
not S3D2.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
