This patch series adds all the r8a7796 FCP, VSP and DU clocks. This includes
not only all the clocks required for display, but also the FCPC, FCPF, VSPB
and VSPI0 clocks to cover all the FCP and VSP instances.
The FCPC and DU parent clocks haven't been confirmed yet. I'm however quite
confident that at least the DU clocks are correct, as they both match the
corresponding VSPD clocks (the VSPD supplying frames to the DU, it makes sense
to have both IP cores clocked from the same source) and result in the right
display ouput timings (while setting the DU parent clocks to S0D1 results in
half the expected frame rate).
Laurent Pinchart (3):
clk: renesas: r8a7796: Add FCP clocks
clk: renesas: r8a7796: Add VSP clocks
clk: renesas: r8a7796: Add DU and LVDS clocks
drivers/clk/renesas/r8a7796-cpg-mssr.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)