[PATCH 1/2] clk: renesas: r8a7796: Add CSI2 clocks

[Niklas Söderlund]

Signed-off-by: Niklas Söderlund <niklas.soderlund+rene...@ragnatech.se>
---
 drivers/clk/renesas/r8a7796-cpg-mssr.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c 
b/drivers/clk/renesas/r8a7796-cpg-mssr.c
index eb347ed..ade75e7 100644
--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
@@ -102,6 +102,8 @@ static const struct cpg_core_clk r8a7796_core_clks[] 
__initconst = {
        DEF_FIXED("cl",         R8A7796_CLK_CL,    CLK_PLL1_DIV2, 48, 1),
        DEF_FIXED("cp",         R8A7796_CLK_CP,    CLK_EXTAL,      2, 1),
 
+       DEF_DIV6P1("csi0",      R8A7796_CLK_CSI0,  CLK_PLL1_DIV4, 0x00c),
+
        DEF_DIV6_RO("osc",      R8A7796_CLK_OSC,   CLK_EXTAL, CPG_RCKCR,  8),
        DEF_DIV6_RO("r_int",    CLK_RINT,          CLK_EXTAL, CPG_RCKCR, 32),
 
@@ -121,6 +123,8 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] 
__initconst = {
        DEF_MOD("rwdt0",                 402,   R8A7796_CLK_R),
        DEF_MOD("intc-ap",               408,   R8A7796_CLK_S3D1),
        DEF_MOD("thermal",               522,   R8A7796_CLK_CP),
+       DEF_MOD("csi20",                 714,   R8A7796_CLK_CSI0),
+       DEF_MOD("csi40",                 716,   R8A7796_CLK_CSI0),
        DEF_MOD("etheravb",              812,   R8A7796_CLK_S0D6),
        DEF_MOD("gpio7",                 905,   R8A7796_CLK_S3D4),
        DEF_MOD("gpio6",                 906,   R8A7796_CLK_S3D4),
-- 
2.10.2