From: Keita Kobayashi <[email protected]> This patch adds DVFS clock for R8A7795 SoC.
Signed-off-by: Keita Kobayashi <[email protected]> Signed-off-by: Gaku Inami <[email protected]> Signed-off-by: Dien Pham <[email protected]> Signed-off-by: Takeshi Kihara <[email protected]> Signed-off-by: Geert Uytterhoeven <[email protected]> --- drivers/clk/renesas/r8a7795-cpg-mssr.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c index 50698a7d90745447..bfffdb00df972547 100644 --- a/drivers/clk/renesas/r8a7795-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c @@ -221,6 +221,7 @@ enum clk_ids { DEF_MOD("can-if0", 916, R8A7795_CLK_S3D4), DEF_MOD("i2c6", 918, R8A7795_CLK_S3D2), DEF_MOD("i2c5", 919, R8A7795_CLK_S3D2), + DEF_MOD("i2c-dvfs", 926, R8A7795_CLK_CP), DEF_MOD("i2c4", 927, R8A7795_CLK_S3D2), DEF_MOD("i2c3", 928, R8A7795_CLK_S3D2), DEF_MOD("i2c2", 929, R8A7795_CLK_S3D2), -- 1.9.1
