On 01/27/2017 11:26 PM, Rob Herring wrote:
> On Tue, Jan 24, 2017 at 07:26:41PM +0100, Marek Vasut wrote:
>> Add DT bindings for the Renesas RCar GyroADC block. This block is
>> a simple 4/8-channel ADC which samples 12/15/24 bits of data every
>> cycle from all channels.
>>
>> Signed-off-by: Marek Vasut <marek.va...@gmail.com>
>> Cc: Geert Uytterhoeven <geert+rene...@glider.be>
>> Cc: Simon Horman <horms+rene...@verge.net.au>
>> Cc: Jonathan Cameron <ji...@kernel.org>
>> Cc: linux-renesas-soc@vger.kernel.org
>> Cc: Wolfram Sang <w...@the-dreams.de>
>> Cc: Rob Herring <r...@kernel.org>
>> Cc: devicet...@vger.kernel.org
>> ---
>> V8: - Sync the version with the 2/2 driver patch
>> - Drop status prop from example
>> - Add GyroADC block description
>> - Enumerate the compatible string values
>> - Make subnodes mandatory
>> ---
>> .../bindings/iio/adc/renesas,gyroadc.txt | 99
>> ++++++++++++++++++++++
>> 1 file changed, 99 insertions(+)
>> create mode 100644
>> Documentation/devicetree/bindings/iio/adc/renesas,gyroadc.txt
>>
>> diff --git a/Documentation/devicetree/bindings/iio/adc/renesas,gyroadc.txt
>> b/Documentation/devicetree/bindings/iio/adc/renesas,gyroadc.txt
>> new file mode 100644
>> index 000000000000..7f9b3bd120a9
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/iio/adc/renesas,gyroadc.txt
>> @@ -0,0 +1,99 @@
>> +* Renesas RCar GyroADC device driver
>> +
>> +The GyroADC block is a reduced SPI block with up to 8 chipselect lines,
>> +which supports the SPI protocol of a selected few SPI ADCs. The SPI ADCs
>> +are sampled by the GyroADC block in a round-robin fashion and the result
>> +presented in the GyroADC registers.
>> +
>> +Required properties:
>> +- compatible: Should be "<soc-specific>", "renesas,rcar-gyroadc".
>> + The <soc-specific> should be one of:
>> + renesas,r8a7791-gyroadc - for the GyroADC block present
>> + in r8a7791 SoC
>> + renesas,r8a7792-gyroadc - for the GyroADC with interrupt
>> + block present in r8a7792 SoC
>> +- reg: Address and length of the register set for the device
>> +- clocks: References to all the clocks specified in the clock-names
>> + property as specified in
>> + Documentation/devicetree/bindings/clock/clock-bindings.txt.
>> +- clock-names: Shall contain "fck" and "if". The "fck" is the GyroADC
>> block
>> + clock, the "if" is the interface clock.
>> +- power-domains: Must contain a reference to the PM domain, if available.
>> +- #address-cells: Should be <1> (setting for the subnodes) for all ADCs
>> + except for "fujitsu,mb88101a". Should be <0> (setting for
>> + only subnode) for "fujitsu,mb88101a".
>> +- #size-cells: Should be <0> (setting for the subnodes)
>> +
>> +Sub-nodes:
>> +You must define subnode(s) which select the connected ADC type and reference
>> +voltage for the GyroADC channels.
>> +
>> +Required properties for subnodes:
>> +- compatible: Should be either of:
>> + "fujitsu,mb88101a"
>> + - Fujitsu MB88101A compatible mode,
>> + 12bit sampling, up to 4 channels can be sampled in
>> + round-robin fashion. One Fujitsu chip supplies four
>> + GyroADC channels with data as it contains four ADCs
>> + on the chip and thus for 4-channel operation, single
>> + MB88101A is required. The Cx chipselect lines of the
>> + MB88101A connect directly to two CHS lines of the
>> + GyroADC, no demuxer is required. The data out line
>> + of each MB88101A connects to a shared input pin of
>> + the GyroADC.
>> + "ti,adcs7476" or "ti,adc121" or "adi,ad7476"
>> + - TI ADCS7476 / TI ADC121 / ADI AD7476 compatible mode,
>> + 15bit sampling, up to 8 channels can be sampled in
>> + round-robin fashion. One TI/ADI chip supplies single
>> + ADC channel with data, thus for 8-channel operation,
>> + 8 chips are required. A 3:8 chipselect demuxer is
>> + required to connect the nCS line of the TI/ADI chips
>> + to the GyroADC, while MISO line of each TI/ADI ADC
>> + connects to a shared input pin of the GyroADC.
>> + "maxim,max1162" or "maxim,max11100"
>> + - Maxim MAX1162 / Maxim MAX11100 compatible mode,
>> + 16bit sampling, up to 8 channels can be sampled in
>> + round-robin fashion. One Maxim chip supplies single
>> + ADC channel with data, thus for 8-channel operation,
>> + 8 chips are required. A 3:8 chipselect demuxer is
>> + required to connect the nCS line of the MAX chips
>> + to the GyroADC, while MISO line of each Maxim ADC
>> + connects to a shared input pin of the GyroADC.
>> +- reg: Should be the number of the analog input. Should be
>> present
>> + for all ADCs except "fujitsu,mb88101a".
>> +- vref-supply: Reference to the channel reference voltage regulator.
>> +
>> +Example:
>> + vref_max1162: regulator-vref-max1162 {
>> + compatible = "regulator-fixed";
>> +
>> + regulator-name = "MAX1162 Vref";
>> + regulator-min-microvolt = <4096000>;
>> + regulator-max-microvolt = <4096000>;
>> + };
>> +
>> + &adc {
>
> This wouldn't actually work unless you include something that defines
> '&adc'. Make this adc@e6e54000.
Fixed
> With that,
>
> Acked-by: Rob Herring <r...@kernel.org>
Cool, thanks
--
Best regards,
Marek Vasut
