On Monday, January 30, 2017, Laurent Pinchart wrote: > > It depends on the actual hardware: while per-pin settings are suitable > > for SoCs that have per-pin hardware configuration (e.g. RZ/A1), it's > > not suitable for SoCs where that's not the case, and where the > > hardware has group-wise configuration (e.g. on R-Car). > > > > Hence IMHO "the future of Renesas pin control" will remain a split > > personality for a while ;-) > > > > Laurent: please kick me if you disagree... > > I unfortunately agree. Maybe we could try to speed up the process by > providing feedback to the hardware engineers ?
For what it's worth, I fired off my 'rant and rave' last week about the current R-Car PFC block so I'll be curious to see what they say. Of course, I'm on the RZ side of the company, so maybe someone on the R-Car side might have better luck. Chris
