From: Harunobu Kurokawa <[email protected]> This patch adds PCIEC{0,1} clocks for R8A7796 SoC.
Signed-off-by: Harunobu Kurokawa <[email protected]> Signed-off-by: Takeshi Kihara <[email protected]> Signed-off-by: Yoshihiro Kaneko <[email protected]> --- This patch is based on the clk-next branch of linux-clk tree. drivers/clk/renesas/r8a7796-cpg-mssr.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c index 64714ca..877fc75 100644 --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c @@ -137,6 +137,8 @@ enum clk_ids { DEF_MOD("sdif1", 313, R8A7796_CLK_SD1), DEF_MOD("sdif0", 314, R8A7796_CLK_SD0), DEF_MOD("rwdt", 402, R8A7796_CLK_R), + DEF_MOD("pcie1", 318, R8A7796_CLK_S3D1), + DEF_MOD("pcie0", 319, R8A7796_CLK_S3D1), DEF_MOD("usb-dmac0", 330, R8A7796_CLK_S3D1), DEF_MOD("usb-dmac1", 331, R8A7796_CLK_S3D1), DEF_MOD("intc-ap", 408, R8A7796_CLK_S3D1), -- 1.9.1
