Hi Kaneko-san, On Wed, Apr 19, 2017 at 7:46 PM, Yoshihiro Kaneko <[email protected]> wrote: > From: Kazuya Mizuguchi <[email protected]> > > This patch adds EHCI/OHCI{0,1} clocks for R8A7796 SoC. > > Signed-off-by: Kazuya Mizuguchi <[email protected]> > Signed-off-by: Takeshi Kihara <[email protected]> > Signed-off-by: Yoshihiro Kaneko <[email protected]> > ---
Reviewed-by: Geert Uytterhoeven <[email protected]> I.e. will queue in clk-renesas-for-v4.13. > --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c > +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c > @@ -165,6 +165,8 @@ enum clk_ids { > DEF_MOD("vspd0", 623, R8A7796_CLK_S0D2), > DEF_MOD("vspb", 626, R8A7796_CLK_S0D1), > DEF_MOD("vspi0", 631, R8A7796_CLK_S0D1), > + DEF_MOD("ehci1", 702, R8A7796_CLK_S3D4), > + DEF_MOD("ehci0", 703, R8A7796_CLK_S3D4), I cannot confirm the parent clock, though. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected] In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
