Hi Kaneko-san, On Wed, Apr 19, 2017 at 7:46 PM, Yoshihiro Kaneko <[email protected]> wrote: > From: Kazuya Mizuguchi <[email protected]> > > This patch adds SCU(all), SCU(SRC{0,1,2,3,4,5,6,7,8,9}), SCU(CTU00, > CTU01, CTU02, CTU03, MIX0) and SCU (CTU10, CTU11, CTU12, CTU13, MIX1) > clocks for R8A7796 SoC. > > Signed-off-by: Kazuya Mizuguchi <[email protected]> > Signed-off-by: Takeshi Kihara <[email protected]> > Signed-off-by: Yoshihiro Kaneko <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]> I.e. will queue in clk-renesas-for-v4.13. > --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c > +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c > @@ -219,6 +219,19 @@ enum clk_ids { > DEF_MOD("ssi2", 1013, MOD_CLK_ID(1005)), > DEF_MOD("ssi1", 1014, MOD_CLK_ID(1005)), > DEF_MOD("ssi0", 1015, MOD_CLK_ID(1005)), > + DEF_MOD("scu-all", 1017, R8A7796_CLK_S3D4), I cannot verify the parent clock, though. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected] In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
