Hi Wolfram-san,

> -----Original Message-----
> From: Wolfram Sang
> Sent: Saturday, December 10, 2016 1:52 AM
> 
> The master bit to enable SDIO interrupts can only be accessed if
> SCLKDIVEN bit allows that. However, the core uses the SDIO enable
> callback at times when SCLKDIVEN forbids the change. This leads to
> "timeout waiting for SD bus idle" messages.
> 
> We now activate the master bit in probe once if SDIO is supported. IRQ
> en-/disabling will be done now by the individual IRQ enablement bits
> only.
> 
> Signed-off-by: Wolfram Sang <[email protected]>
> Reviewed-by: Yasushi SHOJI <[email protected]>
> ---
> 
> No change from RFC, only Rev-by added (which included testing).
> 
>  drivers/mmc/host/tmio_mmc_pio.c | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/mmc/host/tmio_mmc_pio.c b/drivers/mmc/host/tmio_mmc_pio.c
> index 7ef24ec620b542..526e52719f81b9 100644
> --- a/drivers/mmc/host/tmio_mmc_pio.c
> +++ b/drivers/mmc/host/tmio_mmc_pio.c
> @@ -140,12 +140,10 @@ static void tmio_mmc_enable_sdio_irq(struct mmc_host 
> *mmc, int enable)
> 
>               host->sdio_irq_mask = TMIO_SDIO_MASK_ALL &
>                                       ~TMIO_SDIO_STAT_IOIRQ;
> -             sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
>               sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
>       } else if (!enable && host->sdio_irq_enabled) {
>               host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
>               sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
> -             sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
> 
>               host->sdio_irq_enabled = false;
>               pm_runtime_mark_last_busy(mmc_dev(mmc));
> @@ -1203,7 +1201,7 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
>       if (pdata->flags & TMIO_MMC_SDIO_IRQ) {
>               _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
>               sd_ctrl_write16(_host, CTL_SDIO_IRQ_MASK, _host->sdio_irq_mask);
> -             sd_ctrl_write16(_host, CTL_TRANSACTION_CTL, 0x0000);
> +             sd_ctrl_write16(_host, CTL_TRANSACTION_CTL, 0x0001);
>       }

I'm afraid but I would like to confirm about this 6 month ago's patch :)

This patch enables CTL_TRANSACTION_CTL to 0x0001 in tmio_mmc_host_probe().
But, I have a concern we have to disable/enable the register in suspend/resume()
because registers setting is possible to be cleared after resume.
What do you think?

Best regards,
Yoshihiro Shimoda

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