From: Takeshi Kihara <[email protected]>

This patch fixes the implementation incorrect of IPSR register value
definitions for FMCLK{_C,_D} and FMIN{_C,_D} pins function.

This is a correction to the incorrect implementation of IPSR register pin
assignment of the specifications updated for R8A7795 ES2.0 SoC in R-Car
Gen3 Hardware User's Manual Rev.0.53E.

Fixes: 12f5d9a1dc7f ("pinctrl: sh-pfc: r8a7795: Replace for Renesas R8A7795 
ES2.0 SoC")
Signed-off-by: Takeshi Kihara <[email protected]>
Signed-off-by: Yoshihiro Kaneko <[email protected]>
---
 drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c 
b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
index 37b96b9..3272713 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
@@ -361,8 +361,8 @@
 #define IP17_23_20     FM(USB1_OVC)            F_(0, 0)        
FM(MSIOF1_SS2_C)        F_(0, 0)                        FM(SSI_WS1_A)   
FM(TS_SDAT0_E)  FM(STP_ISD_0_E)         FM(FMIN_B)      FM(RIF2_SYNC_B)         
F_(0, 0)        FM(REMOCON_B)   F_(0, 0)        F_(0, 0) FM(HCTS2_N_C) F_(0, 0) 
F_(0, 0)
 #define IP17_27_24     FM(USB30_PWEN)          F_(0, 0)        F_(0, 0)        
        FM(AUDIO_CLKOUT_B)              FM(SSI_SCK2_B)  FM(TS_SDEN1_D)  
FM(STP_ISEN_1_D)        FM(STP_OPWM_0_E)FM(RIF3_D0_B)           F_(0, 0)        
FM(TCLK2_B)     FM(TPU0TO0)     FM(BPFCLK_C) FM(HRTS2_N_C) F_(0, 0) F_(0, 0)
 #define IP17_31_28     FM(USB30_OVC)           F_(0, 0)        F_(0, 0)        
        FM(AUDIO_CLKOUT1_B)             FM(SSI_WS2_B)   
FM(TS_SPSYNC1_D)FM(STP_ISSYNC_1_D)      FM(STP_IVCXO27_0_E)FM(RIF3_D1_B)        
F_(0, 0)        FM(FSO_TOE_N)   FM(TPU0TO1)     F_(0, 0) F_(0, 0) F_(0, 0) 
F_(0, 0)
-#define IP18_3_0       FM(USB3_PWEN)           F_(0, 0)        F_(0, 0)        
        FM(AUDIO_CLKOUT2_B)             FM(SSI_SCK9_B)  FM(TS_SDEN0_E)  
FM(STP_ISEN_0_E)        F_(0, 0)        FM(RIF2_D0_B)           F_(0, 0)        
F_(0, 0)        FM(TPU0TO2)     F_(0, 0) FM(FMCLK_C) FM(FMCLK_D) F_(0, 0)
-#define IP18_7_4       FM(USB3_OVC)            F_(0, 0)        F_(0, 0)        
        FM(AUDIO_CLKOUT3_B)             FM(SSI_WS9_B)   
FM(TS_SPSYNC0_E)FM(STP_ISSYNC_0_E)      F_(0, 0)        FM(RIF2_D1_B)           
F_(0, 0)        F_(0, 0)        FM(TPU0TO3)     F_(0, 0) FM(FMIN_C) FM(FMIN_D) 
F_(0, 0)
+#define IP18_3_0       FM(USB3_PWEN)           F_(0, 0)        F_(0, 0)        
        FM(AUDIO_CLKOUT2_B)             FM(SSI_SCK9_B)  FM(TS_SDEN0_E)  
FM(STP_ISEN_0_E)        F_(0, 0)        FM(RIF2_D0_B)           F_(0, 0)        
F_(0, 0)        FM(TPU0TO2)     FM(FMCLK_C) FM(FMCLK_D) F_(0, 0) F_(0, 0)
+#define IP18_7_4       FM(USB3_OVC)            F_(0, 0)        F_(0, 0)        
        FM(AUDIO_CLKOUT3_B)             FM(SSI_WS9_B)   
FM(TS_SPSYNC0_E)FM(STP_ISSYNC_0_E)      F_(0, 0)        FM(RIF2_D1_B)           
F_(0, 0)        F_(0, 0)        FM(TPU0TO3)     FM(FMIN_C) FM(FMIN_D) F_(0, 0) 
F_(0, 0)
 
 #define PINMUX_GPSR    \
 \
-- 
1.9.1

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