We don't have support for that yet, but adding the setting now is trivial and will remove a dependency when adding HS400 support.
Signed-off-by: Wolfram Sang <[email protected]> --- drivers/clk/renesas/rcar-gen3-cpg.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/renesas/rcar-gen3-cpg.c b/drivers/clk/renesas/rcar-gen3-cpg.c index 81b7713afd694c..4d2574f233290a 100644 --- a/drivers/clk/renesas/rcar-gen3-cpg.c +++ b/drivers/clk/renesas/rcar-gen3-cpg.c @@ -68,26 +68,26 @@ struct sd_clock { * sd_srcfc sd_fc div * stp_hck stp_ck (div) (div) = sd_srcfc x sd_fc *------------------------------------------------------------------- + * 0 0 1 (2) (unused) 2 -> HS400 * 0 0 0 (1) 1 (4) 4 -> SDR104 / HS200 * 0 0 1 (2) 1 (4) 8 -> SDR50 * 1 0 2 (4) 1 (4) 16 -> HS / SDR25 * 1 0 3 (8) 1 (4) 32 -> NS / SDR12 * 1 0 4 (16) 1 (4) 64 * 0 0 0 (1) 0 (2) 2 - * 0 0 1 (2) 0 (2) 4 * 1 0 2 (4) 0 (2) 8 * 1 0 3 (8) 0 (2) 16 * 1 0 4 (16) 0 (2) 32 */ static const struct sd_div_table cpg_sd_div_table[] = { /* CPG_SD_DIV_TABLE_DATA(stp_hck, stp_ck, sd_srcfc, sd_fc, sd_div) */ + CPG_SD_DIV_TABLE_DATA(0, 0, 1, 0, 2), CPG_SD_DIV_TABLE_DATA(0, 0, 0, 1, 4), CPG_SD_DIV_TABLE_DATA(0, 0, 1, 1, 8), CPG_SD_DIV_TABLE_DATA(1, 0, 2, 1, 16), CPG_SD_DIV_TABLE_DATA(1, 0, 3, 1, 32), CPG_SD_DIV_TABLE_DATA(1, 0, 4, 1, 64), CPG_SD_DIV_TABLE_DATA(0, 0, 0, 0, 2), - CPG_SD_DIV_TABLE_DATA(0, 0, 1, 0, 4), CPG_SD_DIV_TABLE_DATA(1, 0, 2, 0, 8), CPG_SD_DIV_TABLE_DATA(1, 0, 3, 0, 16), CPG_SD_DIV_TABLE_DATA(1, 0, 4, 0, 32), -- 2.11.0
