On Fri, Aug 04, 2017 at 03:23:00PM +0200, Simon Horman wrote: > From: Takeshi Kihara <[email protected]> > > This patch adds Z2 clock for r8a7795 SoC. > > Signed-off-by: Takeshi Kihara <[email protected]>
It seems that this is missing: Signed-off-by: Simon Horman <[email protected]> > --- > drivers/clk/renesas/r8a7795-cpg-mssr.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c > b/drivers/clk/renesas/r8a7795-cpg-mssr.c > index 084ccf01fae6..b0266a4b0852 100644 > --- a/drivers/clk/renesas/r8a7795-cpg-mssr.c > +++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c > @@ -75,6 +75,7 @@ static struct cpg_core_clk r8a7795_core_clks[] __initdata = > { > > /* Core Clock Outputs */ > DEF_BASE("z", R8A7795_CLK_Z, CLK_TYPE_GEN3_Z, CLK_PLL0), > + DEF_BASE("z2", R8A7795_CLK_Z2, CLK_TYPE_GEN3_Z2, CLK_PLL2), > DEF_FIXED("ztr", R8A7795_CLK_ZTR, CLK_PLL1_DIV2, 6, 1), > DEF_FIXED("ztrd2", R8A7795_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1), > DEF_FIXED("zt", R8A7795_CLK_ZT, CLK_PLL1_DIV2, 4, 1), > -- > 2.1.4 >
