From: Fabrizio Castro <[email protected]>

Add the SDHI controllers to the r8a7745 device tree.

Signed-off-by: Fabrizio Castro <[email protected]>
Signed-off-by: Chris Paterson <[email protected]>
---
This patch is based on renesas-devel-20170913-v4.13.

This patch is dependant on:
- "dt-bindings: mmc: sh_mmcif: Document r8a7745 DT bindings"


 arch/arm/boot/dts/r8a7745.dtsi | 42 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 42 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 8ed2ac5..37c0fac 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -751,6 +751,48 @@
                        max-frequency = <97500000>;
                        status = "disabled";
                };
+
+               sdhi0: sd@ee100000 {
+                       compatible = "renesas,sdhi-r8a7745";
+                       reg = <0 0xee100000 0 0x328>;
+                       interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 314>;
+                       dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
+                              <&dmac1 0xcd>, <&dmac1 0xce>;
+                       dma-names = "tx", "rx", "tx", "rx";
+                       max-frequency = <195000000>;
+                       power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
+                       resets = <&cpg 314>;
+                       status = "disabled";
+               };
+
+               sdhi1: sd@ee140000 {
+                       compatible = "renesas,sdhi-r8a7745";
+                       reg = <0 0xee140000 0 0x100>;
+                       interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 312>;
+                       dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
+                              <&dmac1 0xc1>, <&dmac1 0xc2>;
+                       dma-names = "tx", "rx", "tx", "rx";
+                       max-frequency = <97500000>;
+                       power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
+                       resets = <&cpg 312>;
+                       status = "disabled";
+               };
+
+               sdhi2: sd@ee160000 {
+                       compatible = "renesas,sdhi-r8a7745";
+                       reg = <0 0xee160000 0 0x100>;
+                       interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 311>;
+                       dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
+                              <&dmac1 0xd3>, <&dmac1 0xd4>;
+                       dma-names = "tx", "rx", "tx", "rx";
+                       max-frequency = <97500000>;
+                       power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
+                       resets = <&cpg 311>;
+                       status = "disabled";
+               };
        };
 
        /* External root clock */
-- 
1.9.1

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