From: Yoshihiro Shimoda <[email protected]> This patch enables EthernetAVB for R-Car D3 draak board.
Signed-off-by: Yoshihiro Shimoda <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]> --- arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts index 7b776cb7e928..96b7ff5cc321 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts @@ -11,6 +11,7 @@ /dts-v1/; #include "r8a77995.dtsi" +#include <dt-bindings/gpio/gpio.h> / { model = "Renesas Draak board based on r8a77995"; @@ -18,6 +19,7 @@ aliases { serial0 = &scif2; + ethernet0 = &avb; }; chosen { @@ -37,6 +39,14 @@ }; &pfc { + avb0_pins: avb { + mux { + groups = "avb0_link", "avb0_phy_int", "avb0_mdc", + "avb0_mii"; + function = "avb0"; + }; + }; + scif2_pins: scif2 { groups = "scif2_data"; function = "scif2"; @@ -56,6 +66,21 @@ status = "okay"; }; +&avb { + pinctrl-0 = <&avb0_pins>; + pinctrl-names = "default"; + renesas,no-ether-link; + phy-handle = <&phy0>; + status = "okay"; + + phy0: ethernet-phy@0 { + rxc-skew-ps = <1500>; + reg = <0>; + interrupt-parent = <&gpio5>; + interrupts = <19 IRQ_TYPE_LEVEL_LOW>; + }; +}; + &scif2 { pinctrl-0 = <&scif2_pins>; pinctrl-names = "default"; -- 2.1.4
