Hi Kaneko-san,
On Thu, Nov 16, 2017 at 4:14 AM, Yoshihiro Kaneko <[email protected]> wrote:
> From: Takeshi Kihara <[email protected]>
>
> This patch supports GP-1-28 port pin of R8A7795 ES2.0 SoC added in
> Rev.0.54E of the R-Car Gen3 Hardware User's Manual or later version.
>
> Signed-off-by: Takeshi Kihara <[email protected]>
> Signed-off-by: Yoshihiro Kaneko <[email protected]>
Thanks for your patch!
> --- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
> +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
> @@ -5246,7 +5248,7 @@ enum {
> { RCAR_GP_PIN(1, 19), 0, 3 }, /* A19 */
> } },
> { PINMUX_DRIVE_REG("DRVCTRL8", 0xe6060320) {
> - { PIN_NUMBER('F', 1), 28, 3 }, /* CLKOUT */
> + { RCAR_GP_PIN(1, 28), 28, 3 }, /* CLKOUT */
> { RCAR_GP_PIN(1, 20), 24, 3 }, /* CS0 */
> { RCAR_GP_PIN(1, 21), 20, 3 }, /* CS1_A26 */
> { RCAR_GP_PIN(1, 22), 16, 3 }, /* BS */
You should make a similar change to the corresponding entry for "PUEN2",
cfr. drivers/pinctrl/sh-pfc/pfc-r8a7796.c.
With that fixed:
Reviewed-by: Geert Uytterhoeven <[email protected]>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
